In semiconductor device fabrication steps, thin-film patterns formed on semiconductor wafers have been made finer with larger scales of integration. It is more important to automate process monitoring for accurate, high-speed processing, in order to inspect whether or not the patterns are formed on the wafers as designed.
From the past, scanning electron microscopes (SEMs) have been used as equipment for measuring the dimensions of minute patterns.
SEMs include equipment known as CD (critical-dimension)-SEM, and in this kind of equipment positioning is performed while relying on pattern matching when patterns on semiconductor wafers or masks placed on stages (sample stages) are measured.
The pattern matching method is a technique of causing a template representing a unique pattern formed on a sample to search within a given image region, to identify locations having high degrees of match with the template. Since a relative positional relationship between a pattern identified by the pattern matching and a pattern subjected to a measurement is previously known, it is possible to quickly perform positioning relative to the minute pattern subjected to the measurement. Furthermore, in some cases, subjects of measurement themselves are taken as matching patterns.
In Patent Literature 1, a pattern matching apparatus has been proposed that is designed to perform pattern matching in which a hole pattern is subjected to pattern matching and in which design data about a semiconductor pattern is taken as a template.